Somehow I feel like it has taken me forever to create a somewhat usable set of floating point primitives. So I can report that I have a first version of high-precision floating point primitives coded up in Verilog. Different from a standard IEEE 754 library, those floating point numbers use a 17-bit mantissa, which works much more efficiently with 18x18 bit multipliers as usually available on FPGAs. In addition, the primitives use an unpacked format, thereby reducing the operations necessary to bring values into the arithmetic operation and to prepare the result. There is still a lot of work left around these primitives, so any expert in this area who wants to volunteer some spare time is highly welcome. Aside from more testing, the routines can probably be refined with regard to precision, i.e. making them correct up to the last bit. Further, it would be great if someone could take a look to see how to best match those primitives to an actual FPGA device. Most likely, a certain amount of pipelining will be necessary, which will also guide the timing behavior of the larger design. So if you are interested, please get in touch with me.